Ubuntu 25.10 bumps its baseline RISC-V ISA profile family from RVA20 to RVA23. An RVA (RISC-V Vector Architecture) profile is ...

According to the company, its self-developed Haawking-HX2000 DSP chip series, the world's first based on RISC-V architecture, ...

Abstract CHIPS Alliance has developed an open-source riscv-dv random instruction generator for RISC-V processor verification. This article focuses on the class riscv_asm_program_gen.sv and its various ...

Chipmaker Loongson says server CPUs on par with 2021’s Ice Lake, as local press tout kit to manage 1,024-qubit systems ...

Typically, since their inception, they have been x86 architecture-based, whereas nearly the entire world's smartphones are ...

R&D teams are 'separable' says biz, which is open to offers for parts or the whole European RISC-V biz Codasip has put itself ...

Cyient Semiconductors and MIPS announce collaboration to develop custom RISC-V-based intelligent power solutions.

Customers can build advanced, differentiated solutions that are easy to program using MIPS advanced processor IP, based on the open RISC-V instruction set architecture, combined with Cyient ...

MIPS pioneering patented technology is based on the open specification RISC-V instruction set architecture, enabling customers to move beyond proprietary legacy architecture lock-ins.